Reprints from my posting to SAN-Tech Mailing List and ...

2011/09/21

[san-tech][03381] Intel Hybrid Memory Cube (HMC) に関する Blog, Sep. 15, 2011, Research@Intel

Date: Wed, 21 Sep 2011 20:22:02 +0900
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[san-tech][03564] "Open-Silicon Announces Industry’s First Hybrid Memory Cube Controller IP", June 4, 2012
  Date: Tue, 05 Jun 2012 03:39:56 +0900
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IDF 2011でデモンストレーションされた Intel Hybrid Memory Cube (HMC)
についての Blogです:

"Reinventing DRAM with the Hybrid Memory Cube"
 September 15, 2011. Bryan Casper, Research@Intel
  http://blogs.intel.com/research/2011/09/hmc.php

  "Today, Intel CTO Justin Rattner is demonstrating the Hybrid Memory
   Cube, the fastest and most efficient Dynamic Random Access Memory
   (DRAM) ever built. I want to give you some background on how
   and why we collaborated with Micron on this new memory technology."
.....
.....
  "The result of this joint research project between Micron Technology
   and Intel has been the development of some key achievements. Last year,
   Intel designed and demonstrated an I/O prototype that achieved
   a record-breaking 1.4 milliwatts per gigabit per second energy
   efficiency that was optimized for this hybrid-stacked DRAM application.
   The two companies worked together to jointly develop and specify
   a high-bandwidth memory architecture and protocol for a prototype
   that was designed and manufactured this year by Micron. This
   hybrid-stacked DRAM prototype, known as the Hybrid Memory Cube (HMC),
   is the world's highest bandwidth DRAM device with sustained transfer
   rates of 1 terabit per second (trillion bits per second). On top of that,
   it is also the most energy efficient DRAM ever built when measured
   in number of bits transferred versus energy consumed. This
   groundbreaking prototype has 10 times the bandwidth and 7 times
   the energy efficiency than even the most advanced DDR3 memory module
   available."


デモンストレーションについては、例えば:

"Intel targets exascale computing with new technologies"
 16 September, 2011. ZDNet UK
  http://www.zdnet.co.uk/news/emerging-tech/2011/09/16/intel-targets-exascale-computing-with-new-technologies-40093957/

Intel's Hybrid Memory Cube is a type of low-latency Nand flash memory
technology. Photo credit: Jack Clark
  http://www.zdnet.co.uk/i/z5/illo/nw/story_graphics/11sept/intel-hybrid-cube-memory-clark.jpg


Date: Wed, 21 Sep 2011 20:55:08 +0900
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"Justin Rattner氏キーノートスピーチ
 ~メニイコア時代が到来する"
 2011年 9月 20日,【IDF 2011レポート】, PC Watch
  http://pc.watch.impress.co.jp/docs/news/event/20110920_478686.html

の最後に、

●超広帯域メモリを実現するHMC技術

があります。


キーノートスピーチ Webcast (3件) はこちらで公開されています:
IDF Keynotes
  http://www.intel.com/idf/keynote-speakers/index.htm
==================================================
[san-tech][03160] "Open-Silicon and Micron Align to Deliver Next-Generation Memory Technology", June 7, 2011
  Date: Wed, 08 Jun 2011 19:32:01 +0900

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